ADMETAPlus2024

Advanced Metallization Conference 2024
33rd Asian Session

Day-1 October 3, 2024 (THU)

Session 1: Opening Session
10:00    Opening Talk 1-1
10:10    Award Ceremony: 1-2 

Session 2: Plenary Session -1
10:30 -11:10    2-1 (Plenary Talk 1)   An Ecosystem of Innovative Wet Process Solutions for Creating Customer Value
                                Takumi Mikawa (SCREEN Semiconductor Solutions Co., Ltd.)

11:10 – 11:25   Break

Session 3: Metallization-1

11:25 – 11:55   3-1 (Invited Talk) Tungsten and Copper Interconnect Resistance Reduction Enabling Energy Efficient
                                and High-Performance Applications for 2 nm Node and Beyond
                                Gaurav Thareja 
(Applied Materials)

11:55 – 12:15   3-2   Uniform TiN capped Co-Based Buried Bit Line of the DRAM with 4F2 Cell Architecture
                                 Jiabao Sun, Tielu Liu, Chao Tian, Jun Zhou, Hongbo Sun, Baodong Han, and * Chao Zhao
                                (Beijing Superstring Academy of Memory Technology)
12:15 – 12:35   3-3   Enhanced thermal stability and reduced specific contact resistivity in P-type SiGe ohmic contact
                                 through ultra-thin Mo interlayer
                                 Xu Chen 1,2,3, Jing Xu 1,2, Shujuan Mao 4, Chang Liu 1,2,3 and Jun Luo 1,2
                                (1 Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences, 
                                 2 Institute of Microelectronics, Chinese Academy of Sciences,
                                 3 School of Integrated Circuits, University of Chinese Academy of Sciences,
                                 4 Beijing Superstring Academy of Memory Technology)

12:35 – 14:05   Lunch Break

Session 4: Plenary Session-2
14:05 – 14:45   4-1 (Plenary Talk 2) Latest Technology Trends in the Semiconductor Industry
                                Akihisa Sekiguchi (TEL)

14:45 – 15:25   4-2 (Plenary Talk 3) The Era of Heterogeneous Integration
                                Woong Sun Lee (SK hynix)

15:25 – 15:40   Break

Session 5: Metallization-2
15:40 – 16:10   5-1 (Invited Talk)    Material screening for future diffusion barriers: modelling of binary and                                                 ternary metal alloys and detailed experimental analysis of their barrier performance
                                  Bettina Wehring, Firat Karakus, Lukas Gerlich, Benjamin Lilienthal-Uhlig
 (Fraunhofer IPMS)

16:10 – 16:30   5-2   Point Defects in NiAl Interconnects Probed by Positron Annihilation Spectroscopy and Atom Probe Tomography
                                 ○A. Uedono 1, C. Fleischmann 2,3, J.-P. Soulie 2, M. Ayyad 2, J. E. Scheerder 2, C. Adelmann 2, J. Uzuhashi 4,
T. Ohkubo 4, K. Michishio 5, N. Oshima 5, and S. Ishibashi 6

                                  (1 Faculty of Pure and Applied Science, University of Tsukuba, 2 Imec,
                                 
3 Quantum Solid-State Physics Group, 4 National Institute for Materials Science,
                                  5 Research Institute for Measurement and Analytical Instrumentation, AIST,
                                  6 Research Center for Computational Design of Advanced Functional Materials, AIST)

16:30 – 16:50   5-3   Evaluation of Reactive Sputtered Ti- and V- MAX Alloy Thin Films for Wiring Material by H2 Addition
                                 Takeyasu SAITO, Kazuki UEDA, Naoki OKAMOTO
                                  (Department of Chemical Engineering, Graduate School of Engineering, Osaka Metropolitan University)

16:50 – 17:05   Break

Session 6: CMP Technology

17:05 – 17:35   6-1 (Invited Talk)   CMP Surrly Technology for Advanced Packaging
                                 Anne Miller (FUJIMI INCORPORATED)
17:35 – 18:05   6-2 (Invited Talk) Recent Development of CMP Process for Advanced Metal Interconnects
                                 Hong Jin Kim (Samsung)
18:05 – 18:25   6-3   Post CMP Cleaning for New Interconnect Material NiAl
                                 ○Tomohiro Kusano 1, Tatsushi Baba 1, Kan Takeshita 1 and Nancy Heylen 2
                                (1 Mitsubishi Chemical Corporation, 2 imec vzw)

18:30 – 20:00   Poster Session
P-01  (with drawn) A study of the effect of wet cleaning processes on TIN liner cut off with different techniques
          ○Chaoyang Guan, Jiao Jin, Chao Tian, Wenjun Chen, Mengyuan Zhu, Jian Liu, Baodong Han, Weidu Qin, Hongbo Sun,
Guilei Wang, and Chao Zhao

          (Beijing Superstring Academy of Memory Technology)
P-02   Etching characterization of Si materials in surfactant tetramethylammonium hydroxide solution
          ○Lianlian Li 1,2,3, Guanqiao Sang 1,2,3, Peng Wang 1,2,3, Renjie Jiang 1,2,3, Lei Cao 1,2,3, Qingkun Li 1,2,3,
Meihe Zhang 1,2,3, Zhongrui Wang 1,2,3, Hang Zhang 1,2,3, Anyan Du 1,2,3, Qingzhu Zhang 1,2,3, HuaXiang Yin 1,2,3

          (1 Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences,
           2 Institute of Microelectronics, Chinese Academy of Sciences,
           3 School of Integrated Circuits, University of Chinese Academy of Sciences)

P-03   Design and prediction of CMP process for organic dielectric and Cu layer by deep learning
          T. Tanaka 1, R. Tanaka 1, K. Okada 1, H. Nishizawa 2,6, K. Tsukamoto 2,6, T. Doi 2,66, M. Ozono 3,6, H. Kimuro 3,6,
          H. Hirai 3,6, S. Yamamoto 4, S. Takahashi 5,6, Y. Minami 5,6, M. Yasuda 1,6, M. Sasago 1,6,
T. Saito 1,6, and Y. Hirai 1,6

          1 Osaka Metropolitan Univ., 2 Doi Laboratory Inc., 3 AIST Kyushu, 4 Kyushu Institute of Technology,
          5 Litho Tech Japan, 6 RCS consortium)

P-04   Consideration of the effect of suppressing additives in copper wiring formation using EIS measurement
          ○Naoki Okamoto1 Ikuho Maekawa 1, Takeyasu Saito1 Yoshinobu Yasuda2, Seiji Kamemura3
          (1 Dept. of Chemical Engineering, Osaka Metropolitan University,
           2 Northeastern Industrial Research Center of Shiga Prefecture, 3 PWB Co., Ltd.)

P-05   High Intercalation Doping of MoCl5 to Multilayer Graphene Deposited by CVD
          ○Taisei Higashino and Kazuyoshi Ueno
          (Graduate School of Engineering and Science, Shibaura Institute of Technology)
P-06   Effects of Annealing Conditions on the Interfacial Adhesion Energies of ALD Ru/ZnO Thin Films
          ○Daeyoon Jeong 1, Gahui Kim 1, Minjin Kim 1, Yeseul Son 2, Yuki Mori 2,3 Gyunghyun Kim 5, Juhyun Lee 5,
Changwoo Byun 5, Soo-Hyun Kim 2,4, Young-Bae Park1

          (1 School of Materials Science and Engineering, Andong National University,
          2 Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology, 
          3 Chemical Materials Development Department, TANAKA Precious Metals
          4 Department of Materials Science and Engineering, Ulsan National Institute of Science and Technology, 
          5 Semiconductor Innovation Center, Advanced Institute of Convergence Technology)
P-07   Study of chemical vapor deposition of Cu using CuI on Ta
          ○Yu Miyamoto, Satoshi Yamauchi
          (Quantum Beam Science & Technology, Graduate School of Ibaraki University)
P-08   Hydrazine Delivery Technologies for Low-Temperature ALD TiN in BEOL Process
          ○ Hayato Murata, Yoshifumi Wada, Hideharu Shimizu
          (Taiyo Nippon Sanso Corporation)
P-09   Machine Learning Molecular Dynamics Study of Thermal Boundary Resistance between Barrierless Interconnect Metals
and SiO2 Interlayer Dielectric

          ○Shuichiro Hashimoto1, Yusuke Nishimura2 and Takanobu Watanabe1,2
          (1 Sustainable Energy & Environmental Society Open Innovation Research Organization, Waseda University,
           2 Faculty of Science and Engineering, Waseda University)
P-10   Temperature-Dependent Hysteresis of InSnO and InGaZnO Thin Film Transistors
          Jie Luo 1,2,3,4, Jiabao Sun 4, Yupeng Lu 1,2,3, Yanyu Yang 1,2,3, Guilei Wang 4, Gaobo Xu 1,2,3, Huaxiang Yin 1,2,3,
Chao Zhao 4, Jun Luo 1,2,3

          (1 Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences,
          2 Institute of Microelectronics, Chinese Academy of Sciences,
          3 School of Integrated Circuits, University of Chinese Academy of Sciences,
          4 Beijing Superstring Academy of Memory Technology)
P-11   Impact of asymmetric Source-to-Gate and Drain-to-Gate Overlap Lengths on the Performance of Back Gate IGZO TFTs
          Yunjiao Bao
          (Chinese Academy of Science)
P-12   Spin orbit torque induced Bloch and Néel domain-wall motion and field-free switching in synthetic antiferromagnets
          Bowen Shen 1,2,3, Meiyin Yang 1,2 and Jun Luo 1,2
          (1 Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences,
          2 Institute of Microelectronics, Chinese Academy of Sciences,
          3 School of Integrated Circuits, University of Chinese Academy of Sciences)
P-13   Study on Cu CMP method using the SUAM for backend process
          ○Soma Yamamoto, Kohei Fujioka, Ayumi Nakato, Edmund Soji Otabe and Keisuke Suzuki
          (Graduate School of Computer Science and Systems Engineering, Kyushu Institute of Technology)
P-14   Liquid Film Thickness and Agitation Distribution of Two-Fluid Jet Impingement Surface for Post-CMP Cleaning
          ○Naoto Doi 1, Shinsuke Watanabe 1, Hiroki Takahashi 2, Satomi Hamada 2, Masayoshi Imai 2, and Toshiyuki Sanada 1
          (1 Department of Mechanical Engineering, Shizuoka University, 2 Ebara Corporation)
P-15   Three-Dimensional Numerical Simulation of the Replacement of a Chemical with Water during Single-Wafer Spin Rinsing
          ○Yoshinori Jinbo and Toshiyuki Sanada
          (Dept. of Mechanical Engineering, Shizuoka Univ.)
P-16 (LN)    (with drawn)  Analyse the OHAD optimized mechanism on IGZO TFT for 3D-DRAM by TCAD simulation
Yanyu Yang 1,2,3, Yupeng Lu 1,2,3, Shuang Liu 1,2,3,Renjie Jiang 1,2,3 , Jie Luo 1,2,3, Yunjiao Bao 1,2,3,
Peng Wang 1,2,3, Gaobo Xu* 1,2, Huaxiang Yin 1,2,3
(1 Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences,
2 Institute of Microelectronics, Chinese Academy of Sciences
3 School of Integrated Circuits, University of Chinese Academy of Sciences)                                   

P-17 (LN)  Thermal Stability of Cu/ZrN/Ru/Si structure for n TSV
Masaru Sato and Mayumi B. Takeyama
(School of Earth, Energy and Environmental Engineering, Faculty of Engineering, Kitami Institute of Technology)

Day-2 October 4, 2024 (FRI)   

Session 7: Advanced Packaging
10:00 – 10:30   7-1 (Invited Talk)    Advanced Panel Level Packing Process Based on Plasma Etching Technology for 3D Chiplets Integration
                                  Yasuhiro Morikawa
                                  (ULVAC, Inc.)
10:30 – 10:50   7-2    Structural Strategies for Bendable Multi-Layer Interconnections Based on Fan-Out Wafer-Level Packaging for
Flexible Hybrid Electronics

                                  ○Chang Liu 1, Jiayi Shen 1, Atsushi Shinoda 1, Han Zhang 1, Tetsu Tanaka 1,2 and Takafumi Fukushima 1,2
                                  (1 Graduate School of Engineering, Tohoku University
                                  2 Graduate School of Biomedical Engineering, Tohoku University)
10:50 – 11:10   7-3   Via Last TSV Processes Impacts on TSV Proximity Effect for WoWoW Integration
                                  ○Masaki Haneda, Takuhiro Miyawaki, Naoki Komai, Kan Shimizu, Yoshihisa Kagawa and Hayato Iwamoto
                                  (Sony Semiconductor Solutions Corporation)
11:10 – 11:30   7-4   Development of high-accuracy bonding technology for three-layer stacking structure with 6 µm-pitch Chip
on Wafer Cu-Cu hybrid bonding

                                  ○Takahiro Kamei, Akihiro Urata, Akihisa Sakamoto, Takaaki Hirano, Kan Shimizu, Yoshihisa Kagawa, Hayato Iwamoto”
                                  (Sony Semiconductor Solutions Corporation)

11:30 – 11:45   Break

Session 8: Reliability & Metrology
11:45 – 12:15   8-1 (Invited Talk)   Reliability Challenges for Advanced Ru-AG BEOL Systems
                                Kristof Croes (imec)
12:15 – 12:35   8-2   Analyze of the VTH shift saturation effect on NBS by experiment and TCAD simulation
Yanyu Yang 1,2,3, Yupeng Lu 1,2,3, Shuang Liu 1,2,3, Renjie Jiang 1,2,3, Jie Luo 1,2,3, Yunjiao Bao 1,2,3, Peng Wang 1,2,3,
Gaobo Xu* 1,2, Huaxiang Yin 1,2,3

                                  (1 Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences,
                                   2 Institute of Microelectronics, Chinese Academy of Sciences,
                                   3 School of Integrated Circuits, University of Chinese Academy of Sciences)

12:35 – 14:05   Lunch Break

Session 9: Process Technology
14:05 – 14:25   9-1   SiO2 Etching Mechanism by Vapor HF/ Methanol Etching
                                  ○Hiroto Ohtake 1, Takashi Hattori 1,2, and Masaki Yamada 2
                                  (1 Hitachi High-Tech Corporation, 2 Hitachi Ltd.)
14:25 – 14:45   9-2   Formation and evaluation of ruthenium film using electroless platingECD
                                  Takanobu Hamamura, Yuko Ishii, Tomohiro Shimizu, Takeshi Ito, and Shoso Shingubara
                                  (Graduate School of Science and Engineering, Kansai University)
14:45 – 15:05   9-3   Roughness control of ALD-TIN thin film in 3D metal interconnects
                                  ○Weidu Qin, Chao Tian, Jiao Jin , Chaoyang Guan, Baodong Han, Hongbo Sun, Chao Zhao
(
Beijing Superstring Academy of Memory Technology)

15:05 – 15:20   Break

Session 10: BEOL Devices and New Materials
15:20 – 15:40   10-1   Impact of Source/Drain Oxidation on Performance of IGZO Channel-all-Around (CAA) Transistors
                                  Shuai Li 1, Long Huang 1, Wei Yu 1, Yansan Ma 1, Jing Zhang 1, Fuwang Yang 1, Pan Zeng 1, Peng Zhao 1, Yuqi Li 1,
Jinjuan Xiang 1, liguo Chai 1, Zhengying Jiao 1, Yongqing Shen 1, Hongbo Sun 1, Baodong Han 1, Jiahui Sun 1,
Meichen Jin 1, Qi Hu 1, Xinhe Wang 1, Yang Bai 1, Chuanke Chen 2, Di Geng 2, ling Li 2, Guilei Wang 1*, and Chao Zhao 1*

                                  (1 Beijing Superstring Academy of Memory Technology,
                                   2 Institute of Microelectronics of the Chinese Academy of Sciences)
15:40 – 16:00   10-2   Manipulation of synthetic antiferromagnetic skyrmions array in continuous film by VCMA
                                  ○Shuaiyu Gong 1,2,3, Meiyin Yang 1,2,3, and Jun Luo 1,2,3
                                  (1 Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences, 
                                   2 Institute of Microelectronics, Chinese Academy of Sciences,
                                   3 School of Integrated Circuits, University of Chinese Academy of Sciences)
16:00 – 16:20   10-3   Catalyst-free Direct Growth of Graphene on Si substrate with High Power Pulsed Sputtering (HPPS)
Plasma with styrene as source molecules

                                  ○Yuto Oishi 1, Masanori Shinohara 2, Fumihiko Maeda 3, and Takashi Matsumoto 4
                                  (1 Graduate School of Engineer., Fukuoka Univ.
                                   2 Dept. of Electrical Engineer., Fukuoka Univ.
                                   3 Dept. of Information Electronics, Fukuoka Institute of Technology
                                   4 Tokyo Electron Technology Solutions Limited)

16:20 – 16:30   Closing Remark
                         Closing: Mayumi B. Takeyama (Kitami Institute of Technology)

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