ADMETA 2025

Advanced Metallization Conference 2025

 

Conference Program
October 9, 2025 (THU) Registration Desk Open 9:30
Session 1: Opening Session
[Opening, Award Ceremony]
Chairperson: Keisuke Suzuki (Kyushu Institute of Technology)
                      Noriaki Matsunaga (Applied Materials Japan, Inc.)   
10:00-10:10 Opening Session:
Takayasu Saito (Osaka Metropolitan University)
10:10-10:30 Award Ceremony:
Mayumi B. Takeyama (Kitami Institute of Technology)
[Plenary Talks]
Chairperson: Shoko Ono (Mitsui Chemicals Inc.)
                     Hiroto Ohtake (Applied Materials, Inc.)
10:30-11:10 1-1 Plenary Talk 1:  Introducing a New Transistor Architecture to Enable Scaling beyond Nanosheet Devices
Huiming Bu
(IBM Research)
11:10-11:25 Break
11:25-12:05 1-2 Plenary Talk 2:  Interconnect Innovations Leading the way for the Leading Edge
Christopher J. Wilson
(imec)
12:05-12:45 1-3 Plenary Talk 3:  Metallization Processes for Angstrom Scale Interconnects
Robert D. Clark
(Tokyo Electron Limited)
12:45-14:05 Lunch Break
Session 2: LSI Future & New Material
Chairperson: Seiji Muranaka (Renesas Electronics Corp.)
                      Kan Takeshita (Mitsubishi Chemical Corp.)    
14:05-14:35 2-1 Invited Talk 1:  Paradigm Revolution 2030- Beyond Cliff, Ahead New Paradigm
Manabu Tsujimura
(Ebara Corporation)
14:35-15:05 2-2 Invited Talk 2:  Metallic Interfaces of 2D Semiconductor Materials and Devices
Won-Jong Yoo
(Sungkyunkwan University)
15:05-15:25 2-3  On The Source/Drain-Configuration-Dependent Contact Behavior of IGZO Vertical Channel-All-Around FETs
Shujuan Mao 1, Xianglie Sun 1, Wei Yu 1, Fuwang Yang 1, Jiabao Sun 1, Chuanke Chen 2, Weiwei Li 2,
Di Geng 2, Jing Zhang 1, Guilei Wang 1 and Chao Zhao 1
(1 Beijing Superstring Academy of Memory Technology,China
2 Institute of Microelectronics, Chinese Academy of Sciences, China)
15:25-15:40 Break
Session 3: Process
Chairperson: Hideki Shimizu (SCREEN Holdings, Co. Ltd.)
                      Hidemi Suemori (Hitachi High-Tech Corp.)
15:40-16:10 3-1 Invited Talk 3:  Wet Cleaning Technology for Advanced Semiconductor Device 
Masanobu Sato
(SCREEN Semiconductor Solutions Co., Ltd.)
16:10-16:40 3-2 Invited Talk 4:  Advanced Plasma Etching Technologies for Leading-edge Device Fabrication
Michikazu Morimoto
(Hitachi High-Tech Corporation)
16:40-16:55 Break
16:55-17:15 3-3  Changes in Resistance and Structure of Amorphous-Carbon Film due to Voltage Application between Narrow Gap Electrodes
○Rikuta Nomura 1, Tatsuhiro Nagasaka 2, Kazuyoshi Ueno 1, and Hiroyasu Ishikawa 1
(1 Graduate School of Engineering and Science, Shibaura Institute of Technology, Japan
2 Toray Research Center, Inc., Japan)
17:15-17:35 3-4  Highly Selective Isotropic Atomic Layer Etching of Silicon Using SF₆/H₂/N₂ and Ar/Cl₂ Plasma with an Infrared Heating System
○He Wang 1, Kazumasa Okuma 1, Koji Fujisaki 2, Kenichi Kuwahara 1
(1 Hitachi High-Tech Corporation, Japan
2 Hitachi Ltd., Japan)
17:35-17:55 3-5 Copper Recess Impact on Electrical Connectivity of 2.8 μm-pitch Chip-on-Wafer Hybrid Bonding in CoWoW Integration
○Itsuki Imanishi, Takahiro Kamei, Akihiro Urata, Toru Osako,
Masanori Chiyozono, Kan Shimizu, and Yoshihisa Kagawa
(Sony Semiconductor Solutions Corporation,)
17:55-18:15 3-6 (Late News)  Low-Resistivity TiN Films with Controlled Roughness: ALD Purge Tuning for Advanced 3D memory
○Weidu Qin, Jiabao Sun, Yayuan Qin, Baodong Han, Hongbo Sun, Chao Tian, Chao Zhao
(Beijing Superstring Academy of Memory Technology, China)
Poster Session
Chairperson: Takashi Matsumoto (Tokyo Electron Technology Solutions Ltd.)
                      Hiroto Ohtake (Applied Materials, Inc.)
18:30-20:00 P-1 (withdrawn) Process Optimization Strategy for Advanced MTJ stacks with High Tunneling Magnetoresistance and Robust Perpendicular Magnetic Anisotropy on 300-mm wafer
Haochang Lyu1, Shucheng Dong1, Bowen Dong1*, Guilei Wang1, Chao Zhao1
(1 Beijing Superstring Academy of Memory Technology, China)
P-2  Correlation Between Film Stress, Interfacial Adhesion Energy, and Dielectric Reliability in ALD Ru/ZnO Thin Films under Various Annealing Conditions
○Daeyoon Jeong1, Suyeon Lee1, Yeseul Son2, Yuki Mori2,3, Gyunghyun Kim5, Juhyun Lee5, Changwoo Byun5, Soo-Hyun Kim2,4, Young-Bae Park1†
(1School of Materials Science and Engineering, Gyeongkuk National University, Republic of Korea
2Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology, Republic of Korea
3Chemical Materials Development Department, TANAKA Precious Metals, Tsukuba, Japan
4Department of Materials Science and Engineering, Ulsan National Institute of Science and Technology, Republic of Korea
5Semiconductor Innovation Center, Advanced Institute of Convergence Technology, Republic of Korea)
P-3  Optimization of High-Orientation h-BN Film Growth via N2 Plasma in PE-CVD
○Yukihiro Muta1, Masahito Sugiura1, Takashi Matsumoto1
(1 Tokyo Electron Technology Solutions ltd.1, Japan)
P-4  Reproducible edge contact via dual etching process for BSP-compatible 2d
○Hyokwang Park,1 Kenji Watanabe,2 Takashi Taniguchi,2 and Won Jong Yoo1
(1 SKKU Advanced Institute of Nano-Technology (SAINT) and Department of Nano Science and Technology, Sungkyunkwan University, Korea
2 National Institute for Materials Science, Japan)
P-5  Consideration of the effect of the complexation action of leveling agent on the filling morphology in blind vias during electrolytic copper plating
○Naoki Okamoto1 Ikuho Maekawa1, Takeyasu Saito1 Yoshinobu Yasuda2, Seiji Kamemura3
(1 Dept. of Chemical Engineering, Osaka Metropolitan University, Japan, 2 Northeastern Industrial Research Center of Shiga Prefecture, Japan, 3 PWB Co., Ltd, Japan)
P-6  Area-selective Cu-deposition behavior using CuI-precursor on Ta fine structures
○Yu Miyamoto1 and Satoshi Yamauchi1
(1Quantum Beam Science & Technology, Graduate School of Ibaraki University, Japan)
P-7  Observation of Intralayer Dzyaloshinskii–Moriya Interaction in CoFeB Ferromagnetic Thin Films via Ion Implantation
○Shuo Xu 1,2,3, Peiyue Yu1,2, Yanru Li 1,2, Meiyin Yang 1,2, and Jun Luo 1,2
(1 Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences, China
2 Institute of Microelectronics, Chinese Academy of Sciences, China
3 School of Integrated Circuits, University of Chinese Academy of Sciences, China)
P-8 Graphene Formation at Low Temperature with High-Power Pulsed Sputtering and Plasma-enhanced CVD
○Akihiro Iwata 1, Masanori Shinohara 1, and Takashi Matsumoto 2
(1 Dept. of Electrical Engineer., Fukuoka Univ., Fukuoka, Japan
2 Tokyo Electron Technology Solutions Limited, Nirasaki, Japan)
P-9  Application of Superconductive Assisted Machining (SUAM) to Cu CMP for Backend Interconnects
○Soma Yamamoto 1, Ryuya Yoshizu 1, Takuma Shimizu 2, Otabe Edmond Soji 2 and Keisuke Suzuki 1
(1 Dept. of Computer Science and Systems Engineering, Kyushu Institute of Technology, Japan
2 Dept. of Physics and Information Technology, Kyushu Institute of Technology, Japan)
P-10  Study on the Removal Method of nanoparticles using Cleaning-Assisted resin Particles
○ Keisuke Suzuki and Yuki Suematsu and Natsuko Urushihara and Hamada Satomi and Yutaka Wada and Hirokuni Hiyama
(Kyushu Institute of Technology, Graduate School of Information Engineering, Department of Information Engineering, Advanced Machine Course , Japan
Ebara Corporation, Precision Processing and Interface Control Research Group, Fundamental Technology Research Department, Technology & Intellectual Property Division, Japan
P-11 (Late News)  Low-temperature reduction of tungsten surfaces by vacuum ultraviolet light irradiation under reducing gases
○ Shinichi. Endo1, Akihiro Shimizu2, Fumitoshi Takemoto2
(1 Ushio Inc., Japan, 2 Ushio Inc., Japan)
P-12 (Late News)  Modification of Copper Oxide by Vacuum Ultraviolet Light Irradiation under Different Reducing Atmosphere
○Kaito Katayama1, Takeyasu Saito1, Naoki Okamoto1, Shinichi Endo 2
(1 Osaka Metropolitan Univ., Japan, 2 Ushio Inc., Japan)
P-13 (Late News)  Enhancement of CMP Removal Rate of SiC by Ion Implantation
○Yuya Uchida 1, Sota Ueda 2, Taido Kurauchi 1, Takeshi Matsumoto 1 and Keisuke Suzuki 2
(1 Nissin Ion Equipment Co., Japan, 2 Kyushu Institute of Technology, Japan)
P-14 (Late News) Low-temperature Deposited SiOx Film Applicable to Various 3D-LSI
○Mayumi B. Takeyama and Masaru Sato
(Kitami Institute of Technology, Japan)
October 10, 2025 (THU) Registration Desk Open 9:30

Session 4: ALD

Chairperson: Maryam Hosseini (imec)
                      Takashi Matsumoto (Tokyo Electron Technology Solutions Ltd.)
9:40-10:10 4-1 Invited Talk 5:  Area-Selective Atomic Layer Deposition through Locally Activated and Deactivated Approaches for Bottom-Up Nanopatterning
Woo-Hee Kim
(Hanyang University)
10:10-10:40 4-2 Invited Talk 6:  Scaling in the Future: Atomic Layer Deposition of Metals for Next Generation of Device
Chiyu Zhu
(ASM)
10:40-10:55 Break
10:55-11:15 4-3  Probing Pd-Enhanced Nucleation for Process Development of Ultrathin Continuous ALD-Co Films
○Yubin Deng, Jun Yamaguchi, Yuhei Otaka, Souga Nagai, Noboru Sato, Naoki Tamaoki, Atsuhiro Tsukune, and Yukihiro Shimogaki
(Dept. of Materials Engineering, The Univ. of Tokyo, Japan)
11:15-11:35 4-4  Topographically Selective Atomic Layer Deposition of HfO2 Thin Films in High Aspect Ratio Structures by Vapor-Dosed Surface Protector
○Jiwoo Oh1, 2, and Woo-Hee Kim1, 2, *
(1 Major in Advanced Materials and Semiconductor Engineering and 2 Department of Material Science and Chemical Engineering, Hanyang University, Republic of Korea)
         
Session 5: Interconnect
Chairperson: Masaya Kawano (The University of Tokyo)
                      Naoko Kato (IBM Research – Tokyo)
11:35-12:05 5-1 Invited Talk 7:  A novel BEOL Ru interconnect beyond Cu era
Seongho Park
(imec)
12:05-13:25      Lunch
13:25-13:55     5-2 Invited Talk 8:  Degradation Mechanisms and Reliability Enhancement of Copper Interconnects
Kazuyoshi Ueno and Fumihiro Inoue
(Yokohama National University)
13:55-14:15 5-3 Stress-controlled, Low-Resistivity Ruthenium Thin Films for Sub-2 nm Node Interconnects
○Yusuke Mizobata, Ryosuke Hayashi, Kensei Kugio, Rozu Hemmi, Sho Hamano, Kaito Tabata,
Takahisa Tanaka, and Munehiro Tada
(Keio University, Japan)
14:15-14:35 5-4  Demonstration of Anisotropic Resistivity in CoSn Kagome Metal Thin Films
○Tomoya Nakatani1, Nattamon Suwannaharn2, Rohit Dahule2, Taisuke Sasaki2, and Ryoji Sahara2
(1 Research Center for Magnetic and Spintronic Materials, National Institute for Materials Science, Japan
2 Research Center for Structural Materials, National Institute for Materials Science, Japan)
14:35-14:50 Break
Session 6: Packaging
Chairperson: Noriaki Matsunaga (Applied Materials Japan, Inc.)
                    Eiichiro Sudo (Tokyo Electron Ltd.)
14:50-15:20 6-1 Invited Talk 9:  Wafer bonding W2W Bonding Process Challenges for High Volume Manufacturing
Yoshihiro Kondo
(Tokyo Electron Kyushu Limited)
15:20-15:50 6-2 Invited Talk 10: Enabling High Density Packaging with Digital Lithography
Niranjan Khasgiwale
(Applied Materials Inc.) “本講演のQ&Aはonsiteのみで行います”
15:50-16:05 Break
16:05-16:25 6-3  Integration of 2 × 4 μm pitch capsule-shaped TSVs and 2 μm pitch TSVs for three-layer stacked device
○Seiichiro Masuki, Masaki Haneda, Takuhiro Miyawaki, Yukari Fukumizu, Kosei Kubota,
Kan Shimizu, and Yoshihisa Kagawa
(Sony Semiconductor Solutions Corporation, Kanagawa, Japan)
16:25-16:45 6-4  TSV-Driven Mini-LEDs: Demonstration and Characterization of Heterogeneous 3D-IC Based on a Die-Level Process
○Jiayi Shen 1, Akihiro Tominaga 1, Bungo Tominaga 1, Chang Liu 1, Tetsu Tanaka1,2 and
Takafumi Fukushima1,2
(1 Dept. of Mechanical Systems Engineering, Graduate School of Engineering, Tohoku Univ., Japan
2 Dept. of Biomedical Engineering, Graduate School of Biomedical Engineering, Tohoku Univ., Japan)
16:45-17:05 6-5 Thermally Stable, Low-Temperature Si–Si Bonding with Suppressed Void Formation for μLHP-Integrated 3D Ics
○ Dianping Jiang1, Masaaki Hashimoto1, Hosei Nagano2, and Munehiro Tada1
(1 Keio University, Japan
2 Nagoya University, Japan)
Closing remark

Chairperson: Takayasu Saito (Osaka Metropolitan University)

17:05-17:10 Closing
All sessions will be conducted in English.
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