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 Conference Program
Sepember 13, 2011
Session 1: Opening Session
Chairperson: J. Koike
9:20-9:30 Opening Remarks: K. Ueno, Chair of Asian Session [Shibaura Inst. of Tech.]
Award Ceremony
Keynotes: The Revitalization for Japan - the Platinum Society- [Mitsubishi Research Inst.] H. Komiyama
Keynotes: The Integrated Foundry: A New R&D Approach for the ‘Collaborate to Make’ Era [tei Solutions] S. Ikeda
(Break 10 min)
Session 2: Low-k Dielectrics (1)
Chairperson: S Fukuyama
Invited: Reliability in Device Technologies: Molecular Modeling, Complex Structures and Properties [Stanford Univ.] R. Dauskardt
Super-low-k SiOCH Film with Sufficient Film Modulus and High Thermal Stability Created by Controlling Molecular-level-structure in Neutral-beam-enhanced CVD [Tohoku Univ.] A. Wada, T. Sasaki, S. Yasuhara, and S. Samukawa
Robust Ultra Low-k Dielectric, Fluorocarbon, Deposition by Microwave Plasma Enchanced Chemical Vapor Deposition [Tokyo Electron Tech. Development Inst.] Y. Kikuchi, Y Kobayashi, K. Miyatani, K. Kawamura, T. Nemoto, T. Nozawa, and T. Matsuoka
(Lunch 1 hour 20 min)
Session 3: Low-k Dielectrics (2)
Chairpersons: T. Kokubo
Invited: Materials Challenges in the Integration of Ultra Low-k Dielectric Films [Intel] M. Moinpour
Advanced UV-assisted Restoration for PECVD SiOCH Films with k=2.0 [ASM] Y. Kimura, D. Ishikawa, A. Nakano, A. Kobayashi, K. Matsushita, D. de Roest, and N. Kobayashi
Process Optimization for Improved Compatibility with Organic Non-porous Low-k Dielectric Fluorocarbon on Advanced Cu Interconnects [1Tohoku Univ., 2Tokyo Electron Tech. Development Inst.] X. Gu1, Y. Tomita1, T. Nemoto1,2, K. Miyatani2, A. Saito2, Y. Kobayashi2, A. Teramoto1, R. Kuroda1, S. Kuroki1, T.Nozawa2, T. Matsuoka2, S. Sugawa1, and T. Ohmi1
In-situ Analysis of Modification on Porous SiOCH During and After O2 Plasmas [Nagoya Univ.] K. Asano, H. Yamamoto, K. Ishikawa, K. Takeda, H. Kondo, M. Sekine, and M. Hori
(Break 15 min)
Session 4: Metallization (1)
Chairperson: M. B. Takeyama
15:15-15:35 AMC highlights: [Stanford Univ.] R. Dauskardt
Invited: Performance and Reliability of Cu Mn Alloy Interconnects [IBM] T. Nogami
Characterization of CVD-Mn Barrier Layers Using X-ray Absorption Fine Structure [1Synchrotron Soleil, 2IMEC, 3Tohoku Univ., 4National Inst. for Standards and Tech.] J. M. Ablett1, C. J. Wilson2, N. M. Phuong3, J. Koike3, Z. Tokei2, G. E. Sterbinsky4, and J. C. Woicik4
Thermal Stability of MnOx Diffusion Barrier Layer Formed by Chemical Vapor Deposition [Tohoku Univ.] N. M. Phuong, Y. Sutou, and J. Koike
(Break 15 min)
Session 5: Metallization (2)
Chairperson: O. Nakatsuka
Invited: 64 nm Pitch Cu Dual damascene Interconnects with Self-aligned Via using Pitch Split Double Patterning Scheme [1Toshiba America, 2IBM, 3Renesas, 4ST Microelectronics] T.Usui1, S.T. Chen2, H. Tomizawa1, M. Tagami3, H. Shobha2, M. Sankarapandian2, O. Van der Straten2, J. Kelly2, D. Canaperi2, T. Levine2, Y. Yin2, D. Horak2, M. Ishikawa1, Y. Mignot4, C-S. Koay2, S. Burns2, S. Halle2, H. Kato1, G. Landie4, Y. Xu2, A. Scaduto2, E. McLellan2, J. Maniscalco2, T. Vo2, S. Cohen2, J.C. Arnold2, M. Colburn2, and T. Spooner2
Modified Thermal Response Model for Joule Heating of Multi-level Cu/Low-k Interconnects [Renesas Electronics] S. Yokogawa, H. Tsuchiya, and T. Shimizu
Oxidation Characteristics of Thin Al-Mo Alloy Films as a Metal Capping Layer on Cu [Kitami Insti. of Tech.] M. B. Takeyama, and A. Noya
September 14, 2011
Session 6: Metallization (3)
Chairperson: K. Maekawa
Invited: Metal Deposition Technologies for the 2010’s; Changes and Inflections [Applied Materials] J. Forster
Control of Composition and Nanostructure in CoW Film by CVD and ALD to Develop Barrier Property for Sidewalls of Interconnects in ULSI [1Taiyo-Nippon Sanso, 2Univ. of Tokyo] H. Shimizu1,2, K. Sakoda1, T. Momose2, and Y. Shimogaki2
Highly Scalable and Low Resistance Cu BEOL with CVD-Ru Process [Samsung Electronics] T. Matsuda, E. J. Jung, S. W. Choi, J. Lee, H. Kim, J.-H. Yun, G. Choi, H-K. Kang, and C. Chung
(Break 15 min)
Session 7: Metallization (4)
Chairperson: T. Nemoto
Invited: Recent Advances in Fundamental Understanding of Reliability Phenomena in Downscaled Copper Interconnects [IMEC] K. Croes, C. J. Wilson, M. Lofrano, G.P. Beyer and Z. Tokei
In-situ Spectroscopic Ellipsometry of Cu Deposition Process from Supercritical Fluids -An Evidence for an Abnormal Surface Layer Formation- [Univ. of Yamanashi] T. Sasaki, Y. Tamegai, M. Watanabe, L. Jin, and E. Kondoh
Radical-enhanced ALD TiN Barrier for the Buried Word-line (bWL) Application [Applied Materials] H. Ai, T. Yu, B. Zheng, J. Yuan, H. Lam, and A. Sundarrajan
(Lunch 1 hour 25 min)
Session 8: CMP
Chairperson: J. Amanokura
Invited: Direct CMP of High Porosity Ultra Low k Materials [IMEC] N. Heylen
Invited: Cu Corrosion Caused by Concentration Cell Effect in Cu-CMP Process [CASMAT] K. Okutani
Study of Surface Potential on Interconnection Structure with Electrostatic Force Microscopy [Ebara] S. Shima, A. Fukuda, Y. Wada, K. Tokushige, A. Fukunaga, and M. Tsujimura
Spatial Fourier Transform Analysis of Polishing Pad Surface Topography [Kyushu Inst. of Tech.] P. Khajornrungruang, K. Kimura, K. Suzuki, and T. Kushida
Feasibility Study for Reuse of Chemical Mechanical Polishing Wastewater [Hitachi] M. Kawakubo, S. Watanabe, T. Sugaya, and Y. Yamada
(Break 15 min)
Session 9: MEMS
Chairpersons: N. Hata
Invited: MEMS Vibration Energy Harvesting for Ubiquitous Sensor Networks [NTT Microsystem Integration Lab.] K. Ono, N. Sato, T. Shimamura, M. Ugajin, T. Sakata, S. Mutoh, and Y. Sato
Invited: MEMS Sensors for Automotive Applications [Denso] H.Wado, Y.Takeuchi, Y.Hattori
RF MEMS Planar Solenoidal Inductor with Wide Tunability [Tokyo Insti. of Tech.] A. Shirane, H. Ito, N. Ishihara, and K. Masu
Poster Session and Banquet (17:30-19:30)
Chairperson: H. Kawasaki
Low-k Dielectrics
P-1 Integration of an Organic Ultra Low-k Material (k=2.2) and Applying a Plasma Damage Recovery Process [1CASMAT, 2Sumitomo Bakelite] M. Hirai1, Y. Akiyama1, K. Koga1, H. Kawakami1, S. Komatsu2, N. Saruya1, and K. Nakatani1
P-2 Advanced Spin-On Material of Nano-Cluster ing Silica (NCS) for k=2.0 & ≦1.9[JGC Catalysts and Chemicals] H. Arao, M. Hashimoto, and M. Egami
P-3 Evaluation of SOD Materials for Narrow Pitch Process of 60nm 1/2 Pitch. [CASMAT] Y. Akiyama
P-4 Interface Reaction Behavior Between Mn and SiO2 and the Effects of Adsorbed Moisture in SiO2 [Tohoku Univ.] B. T. Bae, and J. Koike
P-5 Ru and Pt Films Fabrication for 3D Capacitor Electrodes Using Supercritical Fluid Deposition Technique [Univ. of Tokyo] K. Watanabe, T. Momose, and Y. Shimogaki
P-6 Barrier Reliability Evaluation of Electroless Diffusion Barriers and Organosilane Monolayer by Bias Temperature Stress (BTS) Tests [Shibaura Inst. of Tech.] A. Mitsumori, S. Fujishima, and K. Ueno
P-7 Mass Production Reactor design for Cu Interconnects on 12-inch Wafers Using Supercritical Fluid Deposition [Univ. of Tokyo] T. Momose, M. Sugiyama, and Y. Shimogaki
P-8 Adsorption and Desorption Behavior of Organic Additives During Copper Electrodeposition by Rapid Solution Exchange [Osaka Pref. Univ.] T. Saito, Y. Miyamoto, S. Hattori, N. Okamoto, and K. Kondo
P-9 Current Induced Grain Growth of Electroplated Copper Film [1Shibaura Inst. of Tech., 2Toray Research Center] L. Razak1, T. Yamaguchi1, S. Akahori2, H. Hasimoto2, and K. Ueno1
P-10 RuO2 Deposition Using Supercritical Fluid Deposition (SCFD) [Univ. of Tokyo] K. Jung, T. Momose, and Y. Shimogaki
P-11 Making More Reliable Copper Interconnects Using Barrierless Cu Metallization Method [Asia-Pacific Insti. of Creativity] C. H. Lin
P-12 Atomic Layer Deposition of Novel RuAIO Thin Films for Seddless Copper Electroplating Applications [Yeungnam Univ. Univ. of Ulsan] T. Cheon1, S.-H. Choi1, K.-S. Park2. S. kim2, and S.-H. kim1
P-13 Electroless Deposition of Ruthenium Thin Films on Palladium Catalyzed Substrates [Osaka Pref. Univ.] T. Saito, Y. Yoshida, Y. Takagi, N. Okamoto, and K. Kondo
P-14 Interfacial Adhesion Energy of ALD RuAlO Thin Film Between Cu and SiO2: Effect of the Composition of RuAlO Thin Film [1Andong National Univ., 2Yeungnam Univ.] J.-K. Kim1, T. Cheon2, S.-H. Kim2, and Y.-B. Park1
P-15 Atomic Layer Deposition of Ru Thin Films Using a Novel Ru(0) Metallorganic Precursor as a Seed Layer for Copper Metallizations [Yeungnam Univ.] S.Yeo, S.-H. Choi, T. Cheon, and S.-H. Kim
P-16 Plasma-Enhanced Atomic Layer Deposition of Ni and Ni Silicidation [Yonsei Univ.] J. Yoon, W.-H. Kim, J. Song and H. Kim
P-17 CMP Characteristics of SiC Wafers Using a Simultaneous Double-side CMP Machine -Effects of Atmosphere and Ultraviolet Light Irradiation- [1Kyushu Univ., 2Kanazawa Inst. of Tech., 3Konica Minolta Business Technologies, 4Koshiyama Science and Tech. Foundation, 5Fujikoshi Machinery] O. Ohnishi1, T. Doi1, S. Kurokawa1, T. Yamazaki1, M. Uneda1,2, K. Kitamura3, T. Yin1, I. Koshiyama4 and K. Ichikawa5
P-18 Development of New Groove Patterns on CMP Pad -Slurry Flow Analysis Using Digital Image Processing- [1Kyushu Univ., 2Kanazawa Inst. of Tech.] T. Yamazaki1, T. K. Doi1, S. Kurokawa1, M. Uneda1,2, O. Ohnishi1,K. Seshimo1, and Y. Aso1
P-19 Performance Evaluation Method of CMP Pad Conditioner Using Digital Image Correlation (DIC) Processing [1Kyushu Univ., 2Kanazawa Inst. of Tech.] M. Uneda1,2, T. Omote2, K. Ishikawa2, T. Doi 1, S. Kurokawa1 and O. Ohnishi1
P-20 Single-Wafer Cleaning Using Capillary Wave Propagation [1Kaijo, 2Shibaura Inst. of Tech.] K. Suzuki1, Y. Imazeki1, K. Han1, T. Shimura1, J. Soejima1, T. Tatsumi2, K. Kikuchi2, and Y. Koike2
P-21 Performance of Water-soluble Fullerenol as Novel Functional Fine Particles for Sapphire CMP [Kyushu Inst. of Tech.] K. Suzuki, T. Saitou, T. Korezawa, P. Khajornrungruang, and K. Kimura
P-22 Influence of Wafer Edge Geometry on CMP Removal Rate Profile - About Wafer Edge Roll-Off and Notch - [1Ebara.,2Fujitsu Semiconductor] A. Fukuda1, T.Fukuda2, A. Fukunaga1, and M. Tsujimura1
P-23 Effect of Interfacial Microstructures on the Mechanical Reliability of SAC305 Pb-free Solder Bump for 3D IC Packaging [1Andong National Univ., 2Korea Inst. of Industrial Tech.] J.-M. Kim1, M.-H. Jeong1, S. Yoo2, and Y.-B. Park1
P-24 Interfacial Reaction Effect on Electrical Reliability of Cu pillar/Sn-3.5Ag Bump Structure for TSV Applications [Andong National Univ.] B.-H. Kwak, J.-M. Kim, M.-H. Jeong, and Y.-B. Park
P-25 Experiment and Computational Stress Analysis for Shear Performance of PoP Bottom Package Assemblies with Edge and Corner Bonding Materials [1Waseda Univ., 2A*STAR] H. Shi1, F. Che2, and T. Ueda1
P-26 Investigation of Various Options of CTBGA Adhesives for Drop Performance Enhancements in Portable Electronic Products [Waseda Univ.] H. Shi, and T. Ueda
P-27 Heat and Ultraviolet Dual-curable Edge Bonding Materials for Ball Grid Array Packages and the Impact on Solder Joint Reliability [Waseda Univ.] H. Shi, and T. Ueda
P-28 Experiment and Numerical Analysis for Thermal Cycling Reliability of PSvfBGA Assemblies with Edge and Corner Bond Adhesives 1[Waseda Univ., 2A*STAR] H. Shi1, F. Che2, S. Gao2, and T. Ueda1
MtM, Emerging Technologies
P-29 Fabrication and Electrical Properties of Nanocarbon/Metal Hybrid Interconnects [1Shibaura Inst. of Techn., 2LEAP.] M. Takagi1, T. Waku1, Y karasawa1, S. Kuwahara1, N. Sakauma2, A. kajita2, T. Sakai2, and K. Ueno1
P-30 High Aspect Hole Filling with Composition Controlled GeSbTe Film by Chemical Vapor Deposition [1Meiji Univ., 2Gas-phase Growth, 3Toyota Technological Inst.] T. Horiike1, S. Hamada1, T. Uno1, N. Sawamoto1, H. Machida2, M. Ishikawa2, H. Sudo2, Y. Ohshita3, and A. Ogura1
MtM, 3D
P-31 Application of Electro-less Ni Plating for TSV Cu ECP Seed Layer [1Philtech, 2Univ. of Tokyo] S. Nishihara1, E. Haikata1, Y. Furumura1, and T. Ohba2
P-32 Conformal Copper Coating of True 3D Through-holes Using Supercritical Carbon Dioxide [1Univ. of Yamanashi, 2Fujikura] M. Watanabe1, Y. Takeuchi1, T. Ueno1, M. Matsubara1, E. Kondoh1, S. Yamamoto2, N. Kikukawa2, and T. Suemasu2
P-33 Adsorption of Pd Nanoparticle Catalyst for Conformal Electroless Plating of Barrier Layer in a High Aspect Ratio TSV [1Kansai Univ. 2Toray Research Center, 3National Inst. of Information and Communication Tech.] R. Arima1, F. Inoue1, H. Miyake1, T. Shimizu1, T. Ito2, H. Seki2, Y. Shinozaki2, T. Yamamoto2, S. Tanaka3, and T. Terui3, and S. Shingubara1
P-34 12 Inch Bumpless Wafer-On-Wafer (WOW) Fully Integrated 3DIC Process [1ITRI, 2Univ. of Tokyo] S. C. Liao1, C. H. Lin1, P. J. Tzeng1, J. C. Chen1 , S. C. Chen1, C. Y. Wu1, C. C. Chen1, Y. C. Hsin1, Y. F. Hsu1, S. H. Shen1, C. H. Chen1, C.C. Wang1, D. Y. Shu1, T. C. Hsu1, C. H. Ho1, Young Suk Kim2, H. Kitada2, N. Maeda2, K. Fujimoto2, S. Kodama2, T. Ohba2,T. K. Ku1, and M. J. Kao1
September 15, 2011
Session 10: MtM, Nanocarbon Interconnects
Chairpersons: H. Shibata
Invited: Understanding of Interface Properties in Graphene FETs [Univ. of Tokyo] K. Nagashio and A. Toriumi
A Study on Electrical Resistance of CNTs and Their Metal Contacts Using Simplified Test Structure [LEAP] T. Saito, M. Wada, A. Isobayashi, Y. Yamazaki, M. Katagiri, M. Kitamura, B. Ito, T. Matsumoto, N. Sakuma, A. Kajita, and T. Sakai
Fabrication and Characterization of Planarized Carbon Nanotube Via Interconnects [LEAP] M. Katagiri, M. Wada, B. Ito, Y. Yamazaki, M. Suzuki, M. Kitamura, T. Saito, A. Isobayashi, A. Sakata, N. Sakuma, A. Kajita, and T. Sakai
Session 11: MtM, Emerging Technologies
Chairpersons: S. Yokogawa
Invited: Functional Oxide Devices for Non-volatile and Interconnect Switching [AIST] H. Akinaga and H. Shima
Nondestructive Characterization of Size and Size Variability of Nanostructures [AIST] N. Hata and H. Akinaga
(Lunch 1 hour 30 min)
Session 12: MtM, 3D (1)
Chairpersons: T. Ohba
Invited: Development of Deep Via Forming Technology with Conventional Memory Device [Hynix Semiconductor] J. H. Kim, M. S. Suh, Q. H. Chung, J. S. Oh, and K. Y. Byun
Invited: The New Era of 3DIC Collaboration [SPIL] Max Lu
Session 13: MtM 3D (2)
Chairpersons: Y-C. Joo
Surface Microroughness-induced Leakage Current in Through-Silicon Via Interconnects [1Univ. of Tokyo, 2Fujitsu Lab.] H. Kitada1,2, Y. Morikawa1, N. Maeda1, K. Fujimoto1, S. Kodama1, Y. S. Kim1, Y. Mizushima1,2, T. Nakamura2, and T. Ohba1
Comprehensive Study of Local Strain Structures with High Strain Resolution for Through-Silicon Via Interconnects [1Nagoya Univ., 2Univ. of Tokyo, 3Fujitsu Lab.] O. Nakatsuka1, H. Kitada2, Y. S. Kim2, Y. Mizushima3, T. Nakamura3, T. Ohba2, and S. Zaima1
Novel TSV Leakage Current Evaluation Using IR-Optical Beam Irradiation [1Fujitsu Lab., 2Univ. of Tokyo, 3Hamamatsu Photonics] Y. Mizushima1,2, H. Kitada1,2, K. Koshikawa3, S. Suzuki3, T. Nakamura1, and T. Ohba2
(Break 15 min)
Session 14: MtM 3D (3)
Chairpersons: D-Y. Shu
Invited: 3D Interconnect Metrology in ITRI [ITRI] Y. S. Ku
Invited: Electrical and Mechanical Reliability of 3-D Integrated Circuit Using Though-silicon Via (TSV) [Seoul National Univ.] Y.-C. Joo, H.-A-S. Shin, H.-W. Yeon, S.-H. Hwang, B.-J. Kim, and S.-Y. Jung
Thermal Cycling Reliability of Chip Array Thin Core Ball Grid Array Assemblies with Fast Cure and Reworkable Capillary Flow Underfill [Waseda Univ.] H. Shi, and T. Ueda
16:35-16:45 Closing Remark: H. Kawasaki [Mitsubishi Heavy Industries]


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