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@ADMETA2007 Program@


[October 23, Tuesday]
Session 1 Opening session Chairperson: Y. Shimogaki
9:50-10:00 Opening Remarks: S. Shingubara, Chair of Asian Session [Kansai Univ.]
Award Ceremony
10:00-10:40 (1-1) Keynotes: 10 years of BEOL Wiring Innovations - from Cu through Low-k to Airgaps [IBM] D. Edelstein
10:40-11:20 (1-2) Keynotes: Thin Film Metallurgy [Ritsumeikan Univ.] M. Murakami
Session 2 Advanced Interconnect Systems Chairperson: J. Koike
11:20-11:50 (2-1) Invited: Thermal Behavior of Advanced Interconnect Systems [Tech. Univ. Chemnitz] Thomas Gessner
11:50-12:10 (2-2) The Statistical Estimation of the TDDB Lifetimes of 32 nm Technology Node Multilevel Interconnects Using the Monte Carlo Simulation [Renesas Technology Corp.] H. Miyazaki, D. Kodama and N. Suzumura
12:10-12:30 (2-3) Structural Design of Cu Multi-level Interconnects with Air-Gap by Finite Element Method [Toshiba Corp.] T. Usui, T. Murofushi, M. Jimbo, H. Hirayama and H. Shibata
12:30-13:30 Lunch
Session 3 CMP Chairperson: Y. Shimogaki
13:30-14:00 (3-1) Invited: Ru CMP For Bottom Electrode Fromation [Hangyang Univ.] Jin-Goo Park
14:00-14:20 (3-2) Chemical Mechanical Polishing and Wet Cleaning Technologies of Ruthenium for Porous Low-k/Cu Interconnects [Selete, *Tosoh Corp., **Cabot Microelectronics] M. Shiohara, K. Maruyama, M. Abe, M. Imai, K. Namba, N. Tarumi, Y. Hara*, K. Matsumura*, V. Brusic**, C. Thompson**, P. Feeney**, J. Dirksen**, K. Nicholson**, S. Kondo, S. Ogawa and S. Saito
14:20-14:40 (3-3) Electrochemical and Mechanical Characterization of Surface Reaction Layer between Copper and CMP Slurry Chemicals [Ebara Corp.] Shohei Shima, Akira Fukunaga and Manabu Tsujimura
14:40-15:00 (3-4) Cu planer plating for CMP CoC reduction [Ebara Corp.] Keiichi Kurashina, Tsutomu Nakada and Manabu Tsujimura
15:00-15:20 Coffee Break
Session 4 Cu-Metallization (1) Chairperson: K. Ueno, N. Shimizu
15:20-15:50 (4-1) Invited: Electrofill Challenges and Directions for Future Device Generations [Novellus] Jon Reid
15:50-16:10 (4-2) Impurities in Electroplated Copper Interconnects [Fujitsu Lab., *Fujitsu] M. Sunayama, H. Iwata*, M. Terahara*, M. Nakaishi* and N. Shimizu
16:10-16:30 (4-3) Conformal deposition and gap-filling of copper into ultra narrow patterns by supercritical fluid deposition [Univ. of Tokyo] Takeshi MomoseCMasakazu Sugiyama and Yukihiro Shimogaki
16:30-16:50 (4-4) Topography sensitive copper deposition for "post-scalability" era - A novel nano selective deposition mode [Univ. of Yamanashi] Eiichi Kondoh, Michiru Hirose, Eiichi Ukai and Shosaku Aruga
16:50-17:10 (4-5) Scaling of the Cu(Al) seed layer thickness and its impact on the specific resistivity of sub- 100 nm interconnects [IMEC, *affiliate for Texas Instruments at IMEC, **Applied Materials Belgium, ***Applied Materials SCLA] Laureen Carbonell, Henny Volders, Asad Haider*, Nancy Heylen, Roger Palmans, Youssef Travaly, Zsolt T kei, Pieter Boelen**, Aron Rosenfeld***, Tushar Mandrekar***, Jose Luis Hernandez and Serge Vanhaelemeersch
17:10-17:30 (4-6) Three dimensional (3-D) characterization of barrier/seed coverage in via using a dedicated Scanning Transmission Electron Microscope (STEM) [Selete, *Hitachi High-Technologies Corp.] Miyuki Takahashi, Noriaki Oda, Shinichi Ogawa, Mitsuo Ogasawara*, Michiyo Miyakawa* and Hiroshi Kakibayashi*
17:30-17:50 (4-7) CuAl alloy : a robust solution for 45/32nm integration, [CEA-LETI, *NXP Semiconductors, **STMicroelectronics] T. Mourier, T. Vanypre*, J. Torres**, N. Jourdan**, P. Chausse and M. Cordeau
17:50-18:10 (4-8) Guest paper from USA Dan. Edelstein
18:10-20:00 Poster Exhibitor and Banquet@@@@
<Low-k>
(P-1) Effect of UV cure on pore interconnectivity of PECVD SiOC films [ASM Japan K.K.] Kiyohiro Matsushita, Naoto Tsuji, Ken-ichi Kagami, Manabu Kato, Shinya Kaneko and Nobuyoshi Kobayashi
(P-2) Robust Porous PE-CVD SiOC Film (k<2.4) with UV Curing for Cu/low-k Multilevel Interconnects Fabrication [Selete, Inc., *ASM Japan K.K.] J. Nakahira, K. Tomioka, E. Soda, M. Kato*, S. Nakao, K. Matsushita*, and K. Kinoshita
(P-3) Eliminating Device Charging Damage in Electron Beam Curing (EBKTM) of Low-k SiCOH Films on 65nm CMOS devices [Applied Materials Inc., *Sony Semiconductor Kyushu Corporation, **Sony Corporation] Amir Al-Bayati, Ashish Shah, Khaled Elsheref, Takashi Shimizu , Naoyuki Iwasaki, Tsutomu Kiyohara, Alex Demos, JuanCarlos Rocha, Hichem M'Saad, Kiyotaka Tabuchi**, Kensaku Ida*, Koji Kawanami*, Shingo Iemura*, Yoshifumi Nobe*, Yoshimitsu Ishikawa* and Tetsuya Yamane*
(P-4) Evaluating Actual Plasma Damage in Ultra Low-k Materials for 45 nm nodes [CASMAT] Hyoh Takahashi, Yoshio Takimoto, Masahiro Tada and Yoshito Ando
(P-5) TDDB Characteristics of Low-k Dielectrics after Plasma Damage Recovery Process [Fujitsu Lab. Ltd.] T. Imada, Y. Nakata, S. Ozaki, Y. Kobayashi, K, Yoshikawa and T. Nakamura
(P-6) A high-reliable Cu/ULK integration scheme using Metal Hard Mask and Low-k capping film [IMEC, *Affiliated at IMEC from Matsushita Electric Industrial Co., Ltd., **ASM Belgium, ***ASM Japan K. K.] Y. Travaly, M. Tsutsue, A. Ikeda*, P. Verdonck, Zs. T-kei, M. Willegems, J. Van Aelst, H. Struyf, G. Vereecke, E. Kesters, Q. T. Le, M. Claes, N. Heylen, F. Sinapi, O.Richard, D. De Roest**, S. Kaneko***, N. Kemeling**, A. Fukazawa***, N. Matsuki***, K. Matsushita***, N. Tsuji***, K. Kagami***, H. Sprey** and G. Beyer*
(P-7) Integration of 140 nm Pitch Cu Interconnects Featuring Template-type PE-CVD SiOC Film (k<2.4) [Selete Inc., *ASM Japan K. K.] T. Kubota, J. Nakahira, K. Tomioka, E. Soda, K. Matsushita*, N. Oda, K. Kinoshita, S. Kondo, S. Ogawa and S. Saito
(P-8) Porogen concentration dependence of the pore-size distribution in low-k porous silica films with C2H4 groups. [Teikyo Univ. of Science and Technology, *AIST] Y. Maruyama, T. Ohdairai*, R. Suzuki* and Y. Uchida
(P-9) Influence of Moisture Uptake in Porous Par Film on Electrical Properties [Toshiba Corp., *Sony Corp., **NEC Electronics Corp.] N. Nakamura, N. Matunaga, K. Watanabe, H. Miyajima, Y. Enomoto*, N. Okada** and H. Shibata
(P-10) Low dielectric constant borazinic films as copper diffusion barrier prepared by pseudo-remote plasma chemical vapor deposition [Mitsubishi Heavy Industries, Ltd., *Mitsubishi Electric Corp., **Nippon Shokubai Co., Ltd.] Naoki Yasuda*, Tadashi Shimazu, Toshihito Fujiwara, Toshihiko Nishimori, Masahiko Inoue, Hideharu Nobutoki*, Teruhiko Kumada*, Chiho Mizushima**, Takuya Kamiyama** and Tetsuya Yamamoto**
<Cu-Metallization>
(P-11) Cu Alloy Seed Layers for Advanced Barrierless Metallization [National Taiwan Ocean University, *Chin-Min Institute of Technology] Jinn P. Chu and C. H. Lin*
(P-12) Relationship between surface oxidation and resistivity reduction of a Cu-Mn alloy film [Tohoku Univ.] Y. Fujii, J. Iijima and J. Koike
(P-13) New expanded equation describing the resistivity of Cu interconnects with a Cu alloy seed layer and resistivity calculation of 32-nm node Cu interconnects [Renesas Technology Corp.] T. Furuhashi, S. Fukui, Y. Nishioka and A. Osaki
(P-14) One step fabrication method for Cu thin film on insulator by Supercritical fluid deposition [Univ. of Tokyo] Takeshi Uejima, Takeshi Momose, Masakazu Sugiyama and Yukihiro Shimogaki
(P-15) The kinetics of Cu2O-CVD process for ULSI interconnects [Univ. of Tokyo] Yoshio Susa and Yukihiro Shimogaki
(P-16) Low-temperature texture improvement of copper thin films by using hot-filament radical source [Univ. of Yamanashi] Eiichi KONDOH and Masaya FUKASAWA
<ALD, PVD, Barrier Metals>
(P-17) Ru nanostructures using highly conformal Ru ALD and AAO for nanoelectronic applications [POSTECH] Woo-Hee Kim, Sang-Joon Park, J. Y. Son and H. Kim
(P-18) Metal Thin film Prepared by Atomic Layer Deposition for Contact Application of Nanoscale Device [POSTECH] Sung Hwan Bang, Han-Bo-Ram Lee and H. Kim
(P-19) Highly (002) Preferred Ti Films prepared by Hydrogen Introduced DC Magnetron Sputter Techniques [ULVAC, Inc.] Se-Ju Lim*, Min-Soo Kim, Johji Hiroihi, Yoshiyuki Kadokura and Michio Ishikawa
(P-20) Quantitative Studies of Copper Diffusion through Ultra-thin ALD Tantalum Nitride barrier films by High resolution-RBS [National Univ. of Singapore, *Chartered Semiconductor Manufacturing] C. S. Ho, S.L. Liew*, T.K. Chan, P. Malar, T. Osipowicz, C.Y.H. Lim and Lu Li
(P-21) Barrier properties of TiNx thin films formed by nitridation of sputtered Ti with hot-wire activated radical species [Kitami Institute of Technology, *Tohoku Univ.] M. B. Takeyama, M. Sato, Y. Hayasaka*, E. Aoyagi* and A. Noya
<Cleaning Technologies>
(P-22) Analysis of Post-CMP Cleaning Mechanisms for improving TDDB Reliability [Hitachi, Ltd.,*Sanyo Chemical Industries, Ltd.] Yohei Yamada, Yasuhito Yagi*, Nobuhiro Konishi, Naohito Ogiso*, Kiyomi Katsuyama, Shoji Asaka, Junji Noguchi and Tadakazu Miyazaki
(P-23) Drying effect on hydrophobic and hydrophilic surface by IPA [Ebara Corporation] Kouichi Fukaya, Hiroshi Ota, Shinji Kajita, Yukiko Nishioka, Fumitoshi Oikawa, Katsuhiko Tokushige and Manabu Tsujimura
<NiSi and Ni-alloys>
(P-24) Spontaneous Chemical Vapor Growth of NiSi Nanowires and Their Metallic Properties [Pohang University of Science and Technology, *Samsung SDI] Cheol-Joo Kim, Kibum Kang, Yun Sung Woo, Heesung Moon*, Jae-Myung Kim*, Dong-Sik Zang* and Moon-Ho Jo* Cheol-Joo Kim, Kibum Kang, Yun Sung Woo, Heesung Moon*, Jae-Myung Kim*, Dong-Sik Zang* and Moon-Ho Jo
(P-25) Contact Properties of Epitaxial NiSi2/Heavily Doped Si Structures Formed from Ni/Ti/Si Systems [Nagoya Univ., *Osaka Univ.] S. Akimoto, O. Nakatsuka, A. Suzuki, A. Sakai*, M. Ogawa and S. Zaima
(P-26) Chemical Vapor Deposition of Ni-Pt thin film using Pt(PF3)4 and Ni(PF3)4 [Meiji Univ., *Tri Chemical Lab. Inc., **Toyota Technological Institute] S. Imai, A. Ogura, M. Ishikawa*, I. Muramoto*, H. Machida* and Y. Ohshita**
<Interconnect Modeling>
(P-27) Signal transmission through interconnects with repetitive loads [Tokyo Institute of Technology] Shuhei Amakawa, Hiroyuki Ito and Kazuya Masu
<Electroplating>
(P-28) High Aspect-Ratio Pillar Structure with Gold Electroplating and STP Technique for Thick Multilevel Interconnections [NTT Corp., *NTT Advanced Technology Corp.] N. Shimoyama, K. Ono, N. Sato, T. Sakata, K. Kuwabara, H. Ishii, T. Kamei*, K. Kudou* and K. Machida*
(P-29) Self-Catalytic Electroless Plating of Silver by Displacement Reaction [Kansai Univ., *National Institute of Information and Communications Technology] Y.Harada, K.Yamamoto*, S.Tanaka* and S.Shingubara
(P-30) Electrical Characteristics of Electrochemical Plated Cu under Giga Pascal Stresses [Univ. of Tokyo] Tomohira Tabata, Hirotada Gotou, Takehiko Yagi and Takayuki Ohba
[October 24, Wednesday]
Session 5 Packaging Technology and Analysis Chairperason: M. Sugiyama
9:20-9:50 (5-1) Invited: STP Technology - Interconnects, CMOS MEMS, Packaging ? [NTT Corporation, *NTT Advanced Technology Corporation, **Dainippon Screen Mfg. Co., Ltd.] Norio Sato, Hiromu Ishii, Katsuyuki Machida*, and Hideki Adachi**
9:50-10:10 (5-2) High Frequency Characteristics of On-Chip Wirings up to 110 GHz [Tokyo Institute of Technology] Kazuya Miyashita, Hiroyuki Ito, Kenichi Okada and Kazuya Masu
10:10-10:30 (5-3) Wafer-Level-Packaging Inductor with Extremely High Quality Factor and its Application to 5.8GHz LC-type Voltage Controlled Oscillator [Fujikura Ltd., *Tokyo Institute of Technology, **Fujikura Ltd.] Hideki Hatakeyama, Kenichi Okada*, Kazuma Ohashi*, Yusaku Ito*, Naoyuki Ozawa, Masakazu Sato, Takuya Aizawa, Tatsuya Ito, Ryozo Yamauchi**, and Kazuya Masu*
10:30-10:50 (5-4) Observation of Stress Induced Voiding (SIV) in Porous Low-k/Cu interconnects with 70nmf-vias by Optical-Beam-Induced-Resistance-CHanges (OBIRCH) Method [NEC Electronics Corp., *Sony Corp. **Toshiba Corp.] M. Tagami, H. Kunishima, Y. Goto, Y. Miyamori*, Y. Enomoto*, K. Akiyama**, N. Matsunaga** and N. Okada
10:50-11:10 (5-5) Detection of Interconnect Reliability Failures by Non-Biased/Biased IR-OBIRCH Method [Kansai Univ,, *Hamamatsu Photonics Corp.] S. Shingubara, Y. Harada, S. Nakahara, M. Kawakami, K. Koshikawa* and T.Nakamura*
11:10-11:30 Coffee Break
Session 6 Cu-Metallization (2) Chairperson: M. B. Takeyama
11:30-11:50 (6-1) Bottom-up Via Filling by Metal Chloride Reduction Chemical Vapor Deposition [PhyzChemix Corp.] Yuzuru Ogura, Yutaka Osada, Shinya Matsuo, Miho Amada and Mai Kamata
11:50-12:10 (6-2) A study of the electrical resistivity increase in narrow and thin copper interconnects [Toshiba Corp.] M. Wada, M. Yamada, K. Higashi, A. Kajita and H. Shibata
12:10-12:30 (6-3) Resistivity reduction in Cu-Mn alloy self-forming barrier process. [Tohoku Univ.] J. Iijima, Y. Fujii, K. Neishi and J. Koike
12:30-13:30 Lunch
Session 7 Barrier Metals and Silicides Chiarperson: N. Owada
13:30-13:50 (7-1) Self-Restored Barrier using Cu-Mn alloy [Fujitsu Laboratories Ltd., *Fujitsu Limited.] M. Haneda, T. Tabira, H. Sakai*, H. Kudo, M. Sunayama, N. Ohtsuka, A. Tsukune and N. Shimizu
13:50-14:10 (7-2) Application of ZrB2 thin film as a diffusion barrier in Cu interconnects [Kitami Institute of Technology, *ULVAC Materials, Inc., **ULVAC, Inc.] M. B. Takeyama, Y. Nakadai*, S. Kambara*, M. Hatanaka** and A. Noya
14:10-14:30 (7-3) Barrier metal integration for copper contacts on nickel silicide [Fujitsu Ltd., *Fujitsu Lab.] K. Kawamura, S. Akiyama, K. Ohkubo, N. Idani, T. Shirasu, S. Takesako, A. Asneil, M. Sato, T. Oshima, H. Sakai, K. Yanai, M. Nakaishi, N. Shimizu*, H. Watatani and M. Kase
14:30-14:50 (7-4) Atomic layer deposition of Ru/TaNC bi-layer for ultra-thin CVD Cu seed formation [ASM Japan] Daekyun Jeong, Souki Ozawa, Hiroaki Inoue, Akihiko Tashiro, Akira Shimizu and Hiroshi Shinriki
14:50-15:10 (7-5) Dependence of thermal stability of NiSi/Si on crystal orientation [Fujitsu Ltd., *Fujitsu Lab.] K. Okubo, K, Kawamura, S. Akiyama, M. Nakamura*, Y. Kotaka*, T. Itani*, H. Watatani, K. Yanai, M. Nakaishi and M. Kase
15:10-15:30 Coffee Break
Session 8 Low-k Chiarperson: Y. Uchida
15:30-16:00 (8-1) Invited: Porous SiCOH BEOL dielectrics for 45 and 32 nm CMOS technologies [IBM] Stephen M.Gates
16:00-16:20 (8-2) Pore-Connectivity Dependence of Moisture Absorption into Porous Low-k Films by Positron-Annihilation Lifetime Spectroscopy [NEC Corp., *AIST] Fuminori Ito, Tsuneo Takeuchi, Hironori Yamamoto, Toshiyuki Ohdaira*, Ryoichi Suzuki* and Yoshihiro Hayashi
16:20-16:40 (8-3) Process Induced Damages and Recovery by Silylation for Low-k/Cu Interconnects with Highly-Porous Self-Assembled Silica Film [Selete Inc., *Mitsui Chemicals, **ULVAC, Inc., ***AIST] K. Kinoshita, S. Chikaki, E. Soda, K. Tomioka, H. Tanaka*, K. Kohmura*, T. Nakayama**, T. Kikkawa*** and S. Saito
16:40-17:00 (8-4) PBO/SiC hybrid structure with Ti liner for reliable barrier-free interconnect [CASMAT, *Sumitomo Bakelite Co., Ltd] Nobuhide Maeda, Yoshio Takimoto, Yoshinori Sakamoto, Masahiro Tada, Michio Nakajima* and Keisuke Funatsu
17:00-17:20 (8-5) Mechanical properties of High-temperature Vapor-Cured Ultra low-K film (Nanoclustering silica k=2.0) [CATALYSTS & CHEMICALS INDUSTRIES CO., LTD] Hiroki Arao, Miki Egami and Akira Nakashima
17:20-17:30 Closing Remarks: T. Yoda [Toshiba]