{"id":519,"date":"2025-02-21T15:46:03","date_gmt":"2025-02-21T06:46:03","guid":{"rendered":"https:\/\/www.admeta.org\/wp2025\/?post_type=cpt_admeta&#038;p=519"},"modified":"2025-04-12T14:27:27","modified_gmt":"2025-04-12T05:27:27","slug":"topics-2025-ja","status":"publish","type":"cpt_admeta","link":"https:\/\/www.admeta.org\/2025\/cpt_admeta\/topics-2025-ja","title":{"rendered":"2025-4-ja-\u8b1b\u6f14\u30c6\u30fc\u30de"},"content":{"rendered":"<p><span style=\"font-family: 'times new roman', times, serif; font-size: 14pt; color: #0000ff;\"><b>Topics of interest<\/b><\/span><\/p>\n<p><span style=\"font-family: 'times new roman', times, serif; font-size: 12pt;\">\u25c6<b>Integration<\/b>: Interconnect Structure and Performance, Parasitic Capacitance, Reliability Technology, Testing and Analysis<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif; font-size: 12pt;\"><b>\u25c6Reliability<\/b>: Science and Failure Analysis, EM, SIV, TDDB, Defect Detection and Analysis, Failure Mechanism and Modeling<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span>Metallization<\/b>: PVD, CVD, ALD, Plating, Barrier Metal, New Material, Alloy, Supercritical Fluid, Reflow<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span>Interconnects patterning<\/b>: Etching, Lithography, Advanced Patterning, Hard Mask, Pattern Transfer, SAMs,<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span>Low-k Dielectric<\/b>: CVD, ALD, SOD, Film Properties, New Materials, Dielectric Structures (Air Gap), Metrology<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span>CMP<\/b>: Planarization Technology, Slurry, Pad, Dress, End Point Detection, Cleaning, Anti-corrosive Technology<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span>Contact<\/b>: Silicide, Interface, Solid Phase Reaction, Shallow Junction, Crystal Properties, Electron Properties, Carrier Transport<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span>MEMS\/RF<\/b>: Interconnection Structure and Materials, Packaging, Fabrication Process Technology, Device Design<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span>Emerging Technology<\/b>: Active Wiring, Power Electronics, Silicon Photonics, Flexible Electronics, Energy Harvesting<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span>Backend<\/b> <b>Device Technology<\/b>: Tech. for Embedding Devices (MRAM, PCRAM, ReRAM, DRAM etc.), Materials and Processing of Magnetics, Phase-Change and Resistive-Change Devices, Electrode, Metallization<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span>Nano Carbon and 2D materials<\/b>: \u00a0Graphene, CNT, Transition-metal Dichalcogenide, Deposition, Integration, Electrical Characteristics, Reliability, Evaluation, Analysis<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span>3D and Packaging<\/b>: TSV, TMV, Stacking Method (CoW, WoW), Heterogeneous Integration, Thinning, Planarization, Mold Compound, Bonding, Bump, Stress and Thermal Analysis, Sealing, Cooling, Reliability<\/span><\/p>\n<p><span style=\"font-family: 'times new roman', times, serif; font-size: 14pt;\"><b><span style=\"color: #0000ff;\">Conference Topics<\/span>: October 9-10, 2025 (in English)<\/b><\/span><\/p>\n<p><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>Advanced Integration and Process<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>Advanced Metallization<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>CMP and Cleaning<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>Emerging Technologies<br \/>\n<\/span><b style=\"font-family: 'times new roman', times, serif;\"><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b><span style=\"font-family: 'times new roman', times, serif;\">Next Generation Interconnect (Carbon, Optical Interconnect etc.)<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>Thin films and Dielectrics<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>3D Device, TSV and Packaging<\/span><\/p>\n<p><span style=\"font-family: 'times new roman', times, serif; font-size: 14pt;\"><b><span style=\"color: #0000ff;\">Tutorial Topics<\/span>: October 8, 2025 (in Japanese)<\/b><\/span><\/p>\n<p><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>Semiconductor Market Trend<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>Logic Integration (FEOL)<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>BEOL Integration and reliability<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>Memory (DRAM or\/and NAND)<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>3D Packages<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>CVD\/ALD<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>Etching<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>Metal<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\"><b><span style=\"font-size: 10pt;\">\u25c6<\/span><\/b>CMP<\/span><\/p>\n<p><span style=\"font-family: 'times new roman', times, serif;\">* The full list of invited speakers and tutorial lecturers will be announced later.<br \/>\n<\/span><span style=\"font-family: 'times new roman', times, serif;\">** The official language of the tutorial lecturers is Japanese.<\/span><\/p>\n","protected":false},"featured_media":0,"template":"","txo_year":[80],"class_list":["post-519","cpt_admeta","type-cpt_admeta","status-publish","hentry","txo_year-80"],"aioseo_notices":[],"_links":{"self":[{"href":"https:\/\/www.admeta.org\/2025\/wp-json\/wp\/v2\/cpt_admeta\/519","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.admeta.org\/2025\/wp-json\/wp\/v2\/cpt_admeta"}],"about":[{"href":"https:\/\/www.admeta.org\/2025\/wp-json\/wp\/v2\/types\/cpt_admeta"}],"wp:attachment":[{"href":"https:\/\/www.admeta.org\/2025\/wp-json\/wp\/v2\/media?parent=519"}],"wp:term":[{"taxonomy":"txo_year","embeddable":true,"href":"https:\/\/www.admeta.org\/2025\/wp-json\/wp\/v2\/txo_year?post=519"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}